LSI's (large-scale integrated circuits) have drastically improved integration with improvements in fine processing techniques. With the improved integration, the scales of the logic circuits mounted on LSI's have become significantly increased and made to have high functions. Moreover, by virtue of the system-on-chip technology by which the logic circuits of a microprocessor, an ASIC (application specific integrated circuit) and so on and various memory circuits are mounted together on one semiconductor substrate, various electronic apparatuses have been further developed in terms of high functions and downsizing.
In a conventional LSI, the role of each circuit is fixed. That is, each basic circuit executes only a specified basic operation, and advanced functions are attained by combining a number of these basic circuits. Moreover, the communication channels of information between the basic circuits are determined in the design stage and connections are provided by fixed interconnections.
FIG. 7A shows a signal flow in a conventional LSI. The signal is determined to flow sequentially from A→B→C→D with regard to the circuit blocks A through D as the aforementioned basic circuits, and the roles of the circuit blocks A through D are fixed.
However, since the signal is determined to flow sequentially from A→B→C→D and the roles of the circuit blocks A through D are fixed in the above-mentioned conventional LSI as shown in FIG. 7A, there are the following problems.
That is, if a part of the circuit (for example, the circuit block B) fails as shown in FIG. 7B, then the signal is not transmitted to the circuit blocks subsequent to the circuit block B, and the functions of the whole circuit mounted on the LSI are to be lost. Accordingly, there is a problem that the entire LSI becomes defective even when only one basic circuit (circuit block) fails, and if the logic circuit has a large scale or mounted together with different kinds of elements, the yield of LSI's is reduced.
Moreover, according to the conventional LSI technologies, if, for example, a signal is transmitted parallel from the circuit block A to all of the circuit blocks B, C and D in FIG. 7A, it is required to connect the circuit block A to each of the circuit blocks B, C and D by mutually independent interconnections. There is also a problem that, if the interconnections are miniaturized and complicated, then the parasitic capacitances between the interconnections increase, reducing the operating speed.
Therefore, the object of the present invention is to provide a semiconductor device with a good yield even when the device has a large scale or comprises the logic circuits, memories and so on mounted together.